# ECT 114 Week 2 Quiz

**1. **(TCO 1) Determine the correct Boolean expression for the gate below

**2. **(TCO 1) Determine the correct Boolean expression for the gate below.

**3. **(TCO 1) Determine the correct Boolean expression for the gate below.

**4. **(TCO 1) Determine the correct Boolean expression for the gate below.

**5. **(TCO 1) Determine the correct Boolean expression for the gate below.

**6. **(TCO 1) Determine the correct VHDL assignment statement for the gate below.

**7. **(TCO 1) Determine the correct VHDL assignment statement for the gate below.

**8. **(TCO 1) Determine the correct VHDL assignment statement for the gate below.

**9. **(TCO 1) Determine the correct VHDL assignment statement for the gate below.

**10. **(TCO 1) Determine the correct VHDL assignment statement for the gate below.

**11. **(TCO 2) Determine logic level (HIGH/LOW) on input A at time period T1 and T2 in order for the output of the given logic gate to be as follows.

**12. **(TCO 2) Determine logic level (HIGH/LOW) on input A at time period T1 and T2 in order for the output of the given logic gate to be as follows.

17. (TCO 2) What is the analog specification V_{OH}?

18. (TCO 2) A TTL device has the following specifications.

Maximum V_{IL} = .8 V, minimum V_{IH} = 2 V

An input is measured to be 1.2 V. How will the device interpret that voltage?

19. (TCO 2) A CMOS device has the following specifications. |

20. (TCO 2) Determine the value for minimum V |

21. (TCO 2) Determine the value for maximum V_{IL} of the standard 4000B Series CMOS. (Points : 1)

22. (TCO 1) OUTPUT is equal to CLOCK when ENABLE is _____.

23. (TCO 1) OUTPUT is equal to when ENABLE is